COE 4EK4 (2010 - 2011, Term I)

Microelectronics

Instructor:             Prof. Chih-Hung (James) Chen, ITB-A321, Tel: 525-9140, ext 27084;

                              E-mail: chench@mcmaster.ca

Lecture Time:       Monday and Thursday, 12:30 to 13:20, ETB/227

Tutorial:               Monday, 09:30 to 11:20, ETB/230

Project Time:        Wednesday (L01) or Thursday (L02), 14:30 to 17:20, ITB-A304

Office Hour:         Open office hours or by appointment.

Course Objectives:

This course is concerned with integrated circuit or chip - design, simulation and layout. Specific topis addressed are - CMOS and MOSFET integrated circuit design; fabrication and layout; simulation; digital and analog circuit blocks; computer aided design and analysis; testing and verification.

 

Prerequisite:         ELEC ENG 3EJ4 or 3FB3 or 3FC3;       

Antirequisite:        ELEC ENG 4FD3

 

Text Book:            R.J. Baker, CMOS Circuit Design, Layout, and Simulation, 3rd Edition, Wiley-IEEE Press, 2010. ISBN 978-0-470-88132-3 (see http://cmosedu.com/cmos1/book.htm)

Course Outline:

The course material will be from the class text and other sources such as the texts listed in the references section. It is the students’ responsibility to know in detail the material discussed in class.

· Electronic circuit design

· Virtuoso Spectre Circuit Simulator 

    http://www.cadence.com/products/cic/spectre_circuit/pages/default.aspx

· Layout of CMOS layers, CMOS technology

· Layout of MOSFETS, MOSFET operation and Modelling. BSIM model

· Passive elements – resistor, capacitor, and inductor - layout; temperature and voltage dependence of components

· CMOS logic inverter design

· Static logic gate and cell design

· Transmission gate, flip-flops, and dynamic logic gates

· VLSI layout

· Memory devices and circuits

· Special digital circuits. Dynamic analog circuits

 

Grading:

Mid-term Exams - 40%, Project - 40%, Final Exam - 20%

 

Project: The project involves the design and detailed analysis, modelling and simulation of a digital or analog integrated circuit for a specific purpose or application. Please consult the instructor very early for possible projects and what is expected. Each student must submit an individual project report. You are to utilize the lab time to work on your project.

 

Bell Curve and Attendance:

Bell curve might be applied by the instructor in the case where the level of tests is too high or too difficult to the regular students who follow instructor’s lectures, tutorials, and labs. For students skipping lectures, tutorials, or labs more than 3 times in total in the semester WITHOUT reasons and learning by their own strategies, their performance does not reflect the statistics of instructor’s teaching, and therefore bell curve will NOT be applied to their scores. Attendance will be taken randomly during the semester

 

References:

1.    R.C. Jaeger, Microelectronic Circuit Design,  McGraw-Hill, 97.

2.    A. Sedra and K. Smith, Microelectronic Circuits 4th ed., Oxford, 97.

3.    W. Buchanan, Microelectronic Systems, Wiley, 97.

4.    J. M.  Rabaey, Digital Integrated Circuits - A Design Perspective, Prentice Hall Electronics and VLSI Series, 96.

5.    R.L. Geiger, P. Allen & N. Strader, VLSI Design Techniques for Analog & Digital Circuits, McGraw-Hill, 90.

6.    D.A. Hodges and H.G.Jackson, Analysis and Design of Digital Integrated Circuits, 2nd ed., McGraw-Hill, 88.

7.    L.A. Glaser & D.W. Dobberpuhl, The Design and Analysis of Digital Integrated Circuits, Addison-Wesley, 85.

8.    N. Weste, K. Eshraghian, Principles of CMOS VLSI Design, Addison-Wesley, 85.

9.    D.A. Pucknell, K. Eshraghian, Basic VLSI Design: Systems and Circuits, Prentice Hall, 88.

10. T.A. Dillinger, VLSI Engineering, Prentice Hall, 88.

11.  S. Kang and Y. Leblebici, CMOS Digital Integrated Circuits, McGraw Hill, 96.

 

Policy Reminder:

"The instructor and university reserve the right to modify elements of the course during the term. The university may change the dates and deadlines for any or all courses in extreme circumstances. If either type of modification becomes necessary, reasonable notice and communication with the students will be given with explanation and the opportunity to comment on changes. It is the responsibility of the student to check their McMaster email and course websites weekly during the term and to note any changes."

Senate and the Faculty of Engineering require all course outlines to include the following reminders: “The Faculty of Engineering is concerned with ensuring an environment that is free of all adverse discrimination. If there is a problem, that cannot be resolved by discussion among the persons concerned, individuals are reminded that they should contact the Department Chair, the Sexual Harassment Officer or the Human Rights Consultant, as soon as possible.”

“Students are reminded that they should read and comply with the Statement on Academic Ethics and the Senate Resolutions on Academic Dishonesty as found in the Senate Policy Statements distributed at registration and available in the Senate Office.”

“Academic dishonesty consists of misrepresentation by deception or by other fraudulent means and can result in serious consequences, e.g. the grade of zero on an assignment, loss of credit with a notation on the transcript (notation reads: “Grade of F assigned for academic dishonesty”), and/or suspension or expulsion from the university. It is your responsibility to understand what constitutes academic dishonesty. For information on the various kinds of academic dishonesty please refer to the Academic Integrity Policy, specifically Appendix 3, located at

http://www.mcmaster.ca/senate/academic/ac_integrity.htm

The following illustrates only three forms of academic dishonesty:

1. Plagiarism, e.g. the submission of work that is not one's own or for which other credit has been obtained.

2. Improper collaboration in group work.

3. Copying or using unauthorized aids in tests and examinations.

In this course we will be using a software package designed to reveal plagiarism. Students will be required to submit their work electronically and in hard copy so that it can be checked for academic dishonesty.”

Calculators:                

The McMaster Standard Calculator (Casio FX991) may be used on  tests and examinations.

Assignments for Practice:

Please use the previous exams at the end of the course as practice problems and the problems at the end of the relevant chapters in the text.

 

Announcement:

September 08, 2010:    Welcome to COE 4EK4.

September 08, 2010:    Things to do updated in the lecture 0.

September 12, 2010:    CAA and NDA forms are available in notes web site. The signed forms need to be handed in on Thursday, Sept. 15, 2011 in class. Last submission will result in the delay in your project.

September 12, 2010:    Notes for Lecture 1 posted. Notes for Lecture 2 are taken in class.

September 12, 2010:    Project will be conducted in a group of two students. Please let me know your names, student IDs, email addresses, and preferred time slot(s) in the afternoon. The slot will be assigned based on the first-come-first-sere basis.

September 16, 2010:    Notes for CMC Registration Posted.

September 23, 2010:    Lab schedule posted. Click here for details. (New)

 

Lecture Notes & Assignments:

Please check here for lecture notes and assignments.

 

Last updated on Friday, November 25, 2011.