Digital Systems Design course
McMaster University 


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The labs and project have been developed using the DE2 board. The original version from 2006 has been validated with Quartus 7.1 (build 178 06/25/2007 SJ Full Version Service Pack 1 Windows 32-bit), Modelsim-Altera 6.1g (Revision 2006.08), Visual C++ 6.0 (or GCC 3.3.5 under Gentoo kernel 2.6.13-gentoo-r3) and UART - Terminal v1.9b by Bray++. Subsequent updates have kept pace with the latest compatible releases from Quartus and Modelsim.

Outline of major topics
Labs (from Fall 2014) Project - Hardware Implementation of an Image Decompressor
Adam, Henry and Nicola have also worked on the release of source Verilog files for MP3 audio and MPEG2 audio/video decoders. Further details can be found here.
Last changed on December 31, 2014