Our DRAM Simualtor MCSim is out!

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We are happy to release MCSim: our Open-Source Extensible DRAM Memory Controller Simulator.

MCsim provides a modular and configurable framework, which enables the designer to develop, test, and analyze a specific module of the MC design without affecting the other entities, and hence, eases the modeling of new MC policies. MCsim is designed based on the observation that even though different MCs employ widely different scheduling schemes, they still process memory requests by a set of common functions that are used to implement standard hardware blocks and processing flows. These functions tend to contribute the majority of the code in any simulator, and thus, can be reused across different designs.

We prove the extensibility of MCsim by successfully implement- ing multiple commercial-of-the-shelf (COTS), high-performance, and predictable MCs. Note that the average Lines-of-Code (LOC) required to develop 14 MCs in MCsim is only 133 per controller, demonstrating minimal effort towards implementing new policies. MCsim can be built on any platform supporting C++11, and it can be integrated with any detailed DRAM device model.

MCSim source code is avaiable “HERE” and its details are recently published in the IEEE CAL paper “HERE”