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Refereed Publications:
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M. Nikolic, E. T. Sanchez, J. Wang, A. H. Zadeh, M. Mahmoud, A. Abdelhadi, K. Ibrahim, A. Moshovos,
"Schrodinger's FP Training Neural Networks with Dynamic Floating-Point Containers,"
to appear in the 2024 conference on Machine Learning and Systems (MLSys '2024), April 2024.
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E. Sha, A. Liu, K. Ibrahim, M. Mahmoud, C. Giannoula, A. Moshovos, A. Abdelhadi,
"Marple: Towards 10K Channel Spike Sorting for Untethered Brain-Machine Interfacing,"
to appear in the 29th ACM International Conference on Architectural Support for Programming Languages and Operating Systems (ASPLOS'24), San Diego, CA, Apr 27 - May 1, 2024.
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A. Lascorz, M. Mahmoud, A. H. Zadeh, M. Nikolic, C. Giannoula, A. Abdelhadi, A. Moshovos,
"Atalanta: A Bit is Worth a "Thousand" Values,"
to appear in the 29th ACM International Conference on Architectural Support for Programming Languages and Operating Systems (ASPLOS'24), San Diego, CA, Apr 27 - May 1, 2024.
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R. Gulve, N. Sarhangnejad, G. Dutta, M. Sakr, D. Nguyen, R. Rangel, W. Chen, Z. Xia, M. Wei, N. Gusev, E. Lin, X. Sun, L. Hanxu, N. Katic, A. Abdelhadi, A. Moshovos, K. Kutulakos, and R. Genov,
"39000-Subexposures/s Dual-ADC CMOS Image Sensor with Dual-Tap Coded-Exposure Pixels for Single-Shot HDR and 3D Computational Imaging,"
in IEEE Journal of Solid-State Circuits (JSSC), vol. 58, no. 11, pp. 3150-3163, Nov. 2023. (Date of Publication: 02 June 2023)
[Paper: PDF,
DOI]
- A. M.S. Abdelhadi, E. Sha, and A. Moshovos,
"A Massive-Scale Brain Activity Decoding Chip,"
in Proceedings of the 2022 IEEE Hot Chips Symposium (HCS '2022), August 2022.
[Paper: PDF,
DOI]
[Slides: PDF]
[Chip (fabricated): NEOMA 1.0]
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R. Gulve, N. Sarhangnejad, G. Dutta, M. Sakr, D. Nguyen, R. Rangel, W. Chen, Z. Xia, M. Wei, N. Gusev, E. Lin, X. Sun, L. Hanxu, N. Katic, A. Abdelhadi, A. Moshovos, K. Kutulakos, and R. Genov,
"A 39,000 Subexposures/s CMOS Image Sensor with Dual-tap Coded-exposure Data-memory Pixel for Adaptive Single-shot Computational Imaging,"
in Proceedings of the 2022 IEEE Symposium on VLSI Technology and Circuits, June 2022.
[Paper: PDF,
DOI]
- A. Hadi Zadeh, M. Mahmoud, A. M.S. Abdelhadi, and A. Moshovos,
"Mokey: Enabling Narrow Fixed-Point Inference for Out-of-the-Box Floating-Point Transformer Models,"
in Proceedings of the 2022 ACM/IEEE 49th Annual International Symposium on Computer Architecture (ISCA-49 '2022), June 2022.
[Paper: PDF,
DOI]
[Talk: PDF]
- A. M.S. Abdelhadi, E. Sha, C. Bannon, M. Mahmoud, H. Steenland, and A. Moshovos,
"Noema: Hardware-Efficient Template Matching for Neural Population Pattern Detection,"
in Proceedings of the 2021 54th Annual IEEE/ACM International Symposium on Microarchitecture (MICRO-54 '2021), October 2021.
[Paper: PDF,
HTML5,
DOI]
[Talk: PDF]
[Chip (fabricated): NEOMA 1.0]
- A. M.S. Abdelhadi and H. Li,
"Enabling Mixed-Timing NoCs for FPGAs: Reconfigurable Synthesizable Synchronization FIFOs,"
in Proceedings of the 2021 International Conference on Field-Programmable Logic and Applications (FPL '2021), August 2021.
[Paper: PDF]
- H. Li, A. M.S. Abdelhadi, R. Shi, J. Zhang, and Q. Liu,
"Adversarial Hardware with Functional and Topological Camouflage,"
in Proceedings of the 2021 IEEE International Symposium on Circuits and Systems (ISCAS '2021), May 2021.
- A. M.S. Abdelhadi and H. Li,
"Reconfigurable Synthesizable Synchronization FIFOs,"
in Proceedings of the 2021 IEEE International Symposium on Field-Programmable Custom Computing Machines (FCCM '2021), May 2021.
- I. E. Vivancos, S. Sharify, D. Ly-Ma, A. M.S. Abdelhadi, C. Bannon, M. Nikolic, M. Mahmoud, A. D. Lascorz, G. Pekhimenko, and A. Moshovos,
"Boveda: Building an On-Chip Deep Learning Memory Hierarchy Brick by Brick,"
in Proceedings of the 2021 conference on Machine Learning and Systems (MLSys '2021), April 2021.
[Paper: PDF]
[Talk: SlidesLive]
- H. Li, A. M.S. Abdelhadi, R. Shi, J. Zhang, and Q. Liu,
"Adversarial Hardware with Functional and Topological Camouflage,"
IEEE Transactions on Circuits and Systems II (TCAS-II), vol. 68, no. 5, pp. 1685-1689, May 2021.
[Paper: PDF]
- A. M.S. Abdelhadi,
"Synthesizable Synchronization FIFOs Utilizing the Asynchronous Pulse-Based Handshake Protocol,"
in Proceedings of the 2020 IEEE Nordic Circuits and Systems Conference (NorCAS '2020), October 2020.
[Paper: PDF]
- A. M.S. Abdelhadi,
"High-Throughput Synthesizable Synchronization FIFOs for Mixed-Timing NoCs,"
in Proceedings of the 53rd 2020 Annual IEEE/ACM International Symposium on Microarchitecture (MICRO-53 '2020): 13th International Workshop on Network on Chip Architectures (NoCArc '2020), October 2020.
- A. M.S. Abdelhadi, C. S. Bouganis, and G. A. Constantinides,
"Accelerated Approximate Nearest Neighbors Search Through Hierarchical Product Quantization,"
in Proceedings of the 2019 International Conference on Field-Programmable Technology (ICFPT '2019), December 2019.
[Paper: PDF]
[Talk: PDF,
PPT]
[Code: GitHub]
- A. M.S. Abdelhadi, and L. Shannon,
"Revisiting Deep Learning Parallelism: Fine-Grained Inference Engine Utilizing Online Arithmetic,"
in Proceedings of the 2019 International Conference on Field-Programmable Technology (ICFPT '2019), December 2019.
[Paper: PDF]
[Code: GitHub]
- A. M.S. Abdelhadi, Y. Zhang, D. Chen, G. Datta, P. Beerel, and M.R. Greenstreet
"Two-Phase Asynchronous to Synchronous Interfaces with Early Synchronization for an Open-Source Bundled Data Flow,"
in Proceedings of the 2019 IEEE International Symposium on Asynchronous Circuits and Systems (ASYNC '2019), May 2019.
[Paper: PDF]
- A. M.S. Abdelhadi, G. G.F. Lemieux, and L. Shannon,
"Modular Block-RAM-Based Longest-Prefix Match Ternary Content-Addressable Memories,"
in Proceedings of the 2018 International Conference on Field-Programmable Logic and Applications (FPL '2018), August 2018.
[Acceptance rate: 36/219=16.4%]
[Paper: PDF]
[Talk: PDF,
PPT]
[Code: GitHub]
- A. M.S. Abdelhadi, D. H. Noronha, S. J.E. Wilton, and L. Shannon,
"Deep Neural Networks Benchmark Suite for FPGAs Utilizing a TensorFlow to Routing High-Level Synthesis ,"
in Proceedings of the 2018 Computing Hardware for Emerging Intelligent Sensory Applications (COHESA '2018), Toronto, Ontario, July 2018.
[Paper: PDF,
VSD]
- A. M.S. Abdelhadi and M. R. Greenstreet,
"Interleaved Architectures for High-Throughput Synthesizable Synchronization FIFOs,"
in Proceedings of the 2017 IEEE International Symposium on Asynchronous Circuits and Systems (ASYNC '2017), May 2017.
(Best paper award winner)
[Acceptance rate: 15/44=34%]
[Paper: PDF]
[Talk: PDF]
[Code: GitHub]
- A. M.S. Abdelhadi and G. G.F. Lemieux,
"A Multi-Ported Memory Compiler Utilizing True Dual-port BRAMs,"
in Proceedings of the 2016 IEEE International Symposium on Field-Programmable Custom Computing Machines (FCCM '2016), May 2016.
(Best paper candidate)
[Acceptance rate: 18/93=19%]
[Paper: PDF,
DOI]
[Talk: PDF,
PPT]
[Code: GitHub]
- A. M.S. Abdelhadi and G. G.F. Lemieux,
"Modular Switched Multi-ported SRAM-based Memories,"
ACM Transactions on Reconfigurable Technology and Systems (TRETS) Special Issue on Reconfigurable Components with Source Code, accepted in Jul. 2015. 27 pages.
(Invited)
[Paper: PDF]
[Code: GitHub]
- A. M.S. Abdelhadi and G. G.F. Lemieux,
"Modular SRAM-based Binary Content-Addressable Memories,"
in Proceedings of the 2015 IEEE International Symposium on Field-Programmable Custom Computing Machines (FCCM '2015), May 2015.
[Acceptance rate: 21/95=22%]
[Paper: PDF,
DOI]
[Talk: PDF,
PPT]
[Code: GitHub]
- A. M.S. Abdelhadi and G. G.F. Lemieux,
"Deep and Narrow Binary Content-Addressable Memories using FPGA-based BRAMs,"
in Proceedings of the 2014 International Conference on Field-Programmable Technology (ICFPT '2014), December 2014.
[Acceptance rate: 23/80=29%]
[Paper: PDF,
DOI]
[Code: GitHub]
- A. M.S. Abdelhadi and G. G.F. Lemieux,
"Modular Multi-Ported SRAM-based Memories,"
in Proceedings of the 2014 ACM/SIGDA International Symposium on Field-programmable Gate Arrays (FPGA '2014), February 2014.
(Best paper candidate)
[Acceptance rate: 21/114=18%]
[Paper: PDF,
DOI]
[Talk: PDF,
PPT]
[Code: GitHub]
- A. M.S. Abdelhadi, R. Ginosar, A. Kolodny, and E. G. Friedman,
"Timing-Driven Variation-Aware Synthesis of Hybrid Mesh/Tree Clock Distribution Networks,"
INTEGRATION, the VLSI journal (2013).
[Paper: PDF,
DOI]
[Code: GitHub]
- A. Brant, A. M.S. Abdelhadi, A. Severance, T. Tang, M. Yue, and G. G.F. Lemieux,
"Safe Overclocking of Tightly Coupled CGRAs and Processor Arrays using Razor,"
in Proceedings of the 2013 IEEE intl. Conf. on Field-Programmable Custom Computing Machines (FCCM '2013), April 2013.
[Acceptance rate: 19/110=17%]
[Paper: PDF,
DOI]
[Talk: PDF,
PPT]
[Code: GitHub]
- A. M.S. Abdelhadi, T. Ono, B. Quinton, and M. R. Greenstreet,
"Cell-based Modular mixed-timing Synchronizing FIFOs,"
in Proceeding of the IEEE/ACM 2012 International Conference on Computer-Aided Design (ICCAD '12): Workshop on CAD for Multi-Synchronous and Asynchronous Circuits and Systems, San Jose, CA, November 2012.
[Paper: PDF]
[Code: GitHub]
- A. Brant, A. M.S. Abdelhadi, A. Severance, and G. G.F. Lemieux,
"Pipeline frequency boosting: Hiding dual-ported block RAM latency using intentional clock skew,"
in Proceedings of the IEEE International Conference on Field-Programmable Technology (FPT '2012), December 2012.
[Acceptance rate: 24/114=21%]
[Paper: PDF,
DOI]
[Code: GitHub]
- A. M.S. Abdelhadi and G. G.F. Lemieux,
"Configuration Bitstream Reduction for SRAM-based FPGAs by Enumerating LUT Input Permutations,"
in Proceedings of the International Conference on Reconfigurable Computing and FPGAs (Reconfig '2011), pp. 20-26, Dec. 2011.
[Paper: PDF,
DOI]
[Talk: PDF,
PPT]
[Code: GitHub]
- A. M.S. Abdelhadi, R. Ginosar, A. Kolodny, and E. G. Friedman,
"Synthesis of Variation-Aware Hybrid Clock Distribution Networks,"
in Proceedings of the International Conference of the Israeli Semiconductor Industry (ChipEx '10), June 2010.
[Paper: PDF]
- A. M.S. Abdelhadi, R. Ginosar, A. Kolodny, and E. G. Friedman,
"Timing-Driven Variation-Aware Nonuniform Clock Mesh Synthesis,"
in Proceedings of the ACM/IEEE Great Lakes Symposium on VLSI (GLSVLSI '10), pp. 15-20, May 2010.
[Acceptance rate: 50/165=30%]
[Paper: PDF, DOI]
[Talk: PDF,
PPT]
[Code: GitHub]
Patents:
- A. M.S. Abdelhadi, H. Steenland, A. Moshovos, and C. Bannon,
"SYSTEM AND METHOD FOR TEMPLATE MATCHING FOR NEURAL POPULATION PATTERN DETECTION,"
US Patent,
Publication No.: US2023/0070243 A1,
Publication Date: March 9, 2023.
provisional Application No.: 63/230,333,
Filing Date: August 6, 2021.
US Patent Application Number US2023/0070243 A1,
[Publication: PDF,
HTML]
Preprints:
- M. Nikolić, E. T. Sanchez, J. Wang, A. H. Zadeh, M. Mahmoud, A. Abdelhadi, and A. Moshovos.,
"Schrödinger's FP: Dynamic Adaptation of Floating-Point Containers for Deep Learning Training,"
arXiv preprint arXiv:2204.13666 (2022).
[Paper: PDF, DOI]
- A. H. Zadeh, M. Mahmoud, A. Abdelhadi, and A. Moshovos.,
"Mokey: Enabling Narrow Fixed-Point Inference for Out-of-the-Box Floating-Point Transformer Models,"
arXiv preprint arXiv:2203.12758 (2022).
[Paper: PDF, DOI]
Theses:
- A. M.S. Abdelhadi,
"Architecture of Block-RAM-Based Massively Parallel Memory Structures: Multi-Ported Memories and Content-Addressable Memories,"
Ph.D. Thesis with supervisor Prof. Guy Lemieux, Department of Electrical and Computer Engineering, University of British Columbia, September 2016.
[Thesis: PDF,
URI]
- A. M.S. Abdelhadi,
"Timing-Driven Variation-Aware Hybrid Mesh/Tree Clock Distribution Network Synthesis,"
M.Sc. Thesis with supervisors Prof. Eby Friedman (University of Rochester), Prof. Ran Ginosar (Technion), and Prof. Avinoam Kolodny (Technion), Department of Electrical Engineering, Technion - IIT, December 2010.
[Thesis: PDF,
Abstract]
- A. M.S. Abdelhadi and A. Busool,
"Out-of-order Asynchronous Synchronizer,"
B.Sc. Thesis with supervisor Dr. Reuven Dobkin, Dept. of Electrical Engineering, Technion - IIT, July 2005.
[Thesis: PDF]
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